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| PJLC1V5, 1V5D SINGLE AND DUAL LOW CAPACITANCE ESD / TRANSIENT PROTECTOR FOR 1.5 V SYSTEMS This patented Single and Dual Zener like ESD/Transient Protector has been designed to protect Sensitive Equipment against ESD and prevent Latch-Up events, offering a minimum insertion loss in High speed Data Lines in Communications ports used in Portable Consumer, Computing and Networking Applications operating at 1.5V and below. 3 1 SPECIFICATION FEATURES 2 Maximum Capacitance of 10pF @ 0Vdc, 1 MHz Maximum Leakage Current of 2A @ 1.5V Breakdown Voltage of 1.9V @ 1mA IEC61000-4-2 Compliance 15kV Air, 8kV Contact Discharge Industry Standard SOT23 Package APPLICATIONS High Speed Data Transmission Lines Microcontroller and Microprocessor I/O Interfaces Portable Consumer Electronics Instrumentation Equipment LAN/WAN Equipment 2 1 3 (GND) SOT23 MAXIMUM RATINGS Rating Peak Pulse Power (8/20s Waveform) ESD Voltage (HBM) Operating Temperature Range Storage Temperature Range Lead Soldering Temperature (max 10 s) Symbol P pp V ESD TJ Tstg TL Value 50 >25 -55 to +125 -55 to +150 260 Units W kV C C C ELECTRICAL CHARACTERISTICS Tj = 25C Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8/20s) Clamping Voltage (8/20s) Maximum Peak Pulse Current Off State Junction Capacitance Symbol VWRM VBR IR Vc Vc I pp Cj I BR = 100A I BR = 1mA VR = 1.5V I pp = 1 A I pp = 3 A 8/20 s Waveform 0 Vdc Bias f = 1MHz Between I/O pins and pin 3 Conditions Min Typical Max 1.5 Units V V V 1.75 1.9 1.8 2.2 2.0 4 7 5 6 10 A V V A pF 7/21/2006 Page 1 www.panjit.com PJLC1V5, 1V5D TYPICAL CHARACTERISTICS Tj = 25C Voltage vs Current Characterisitc 100 10 Current, mA 1 0.1 0.01 1 1.5 2 Voltage, Volts 2.5 3 100 TA = 25C 10 Leakage Current, A 1 0.1 0.01 0.001 0.8 1 Leakage Current 1.2 1.4 Voltage, Volts 1.6 1.8 2 Pulse Waveform 110 100 90 80 Percent of Ipp 70 60 50 40 30 20 10 0 0 5 10 15 time, sec 20 25 30 Rise time 10-90% - 8s 50% of Ipp @ 20s 7/21/2006 Page 2 www.panjit.com PJLC1V5, 1V5D TYPICAL APPLICATION INFORMATION ESD Protection for two Data Lines 1.2-1.5V DATA LINE 1 0 DATA LINE 2 1 PJLC1V5D 2 3 (GND) ESD Protection for Four Data Lines 0 1.2-1.5V DATA LINE 1 0 DATA LINE 2 DATA LINE 3 DATA LINE 4 1 2 1 2 PJLC1V5D PJLC1V5D 3 (GND) 7/21/2006 Page 3 www.panjit.com PJLC1V5, 1V5D PACKAGE AND PAD LAYOUT DIMENSIONS De vice PJLC1V5 PJLC1V5D Ma rking Code T1L T2L (c) Copyright PanJit International, Inc 2006 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. 7/21/2006 Page 4 www.panjit.com |
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